1. Field of the Invention
This invention relates to an electronic integrated circuit and, more particularly, to an electronic integrated circuit in which element forming regions are isolated from one another using electrode layers for element isolation.
2. Description of the Background Art
An erasable programmable read only memory or EPROM is a non-volatile memory in which the information can be written electrically and the written information can be erased by irradiating the element with ultraviolet rays, whereby the information can be rewritten any number of times.
FIG. 1 is a sectional view of the EPROM forming the background of the present invention. Referring to FIG. 1, the EPROM forming the background of the present invention will be explained.
On the surface of a semiconductor substrate 1, field oxide films 2 for element isolation are formed at a predetermined interval from each other. A thin insulating film 4 is formed on the field oxide film 2 and an element forming region 3 formed between the adjacent field oxide films 2 in which a semiconductor element is to be formed. On the insulating film 4, there is formed a floating gate 5 which is flat at a central portion and raised at the ends in the form of a wing. The central portion of the floating gate is positioned on the element forming region 3 and the wing portion is positioned on portion of the field oxide films 2. Another insulating film 6 is formed on the floating gate 5. Thus the floating gate is sandwiched between the insulating films 4 and 6. The floating gates 5 are separated from other electrical circuitry so that they are, as it were, floating electrically. A control gate 7 is formed on the insulating film 6. This control gate 7 is a portion of a word line 8. A smooth coat film 9 formed of an insulating material is formed on the word line 8, and bit lines 10, lying orthogonally to the word line 8, are formed on the film 9. A glass coat film 11 for protecting the bit lines 10 is formed on the bit lines 10.
FIG. 2 is an enlarged view of a step portion II of the word line shown in FIG. 1. As shown in FIG. 2, the word line 8 consists of a first electrically conducting layer 81 and a second electrically conducting layer 82. As the material for the first electrically conducting layer, polysilicon, for example, is employed. As the material for the second electrically conducting layer, a silicide of high melting point metals, such as tungsten silicide or molybdenum silicide, is employed. The reason of using these silicides is to lower the electrical resistance of the word line.
In the EPROM shown in FIG. 1, the word line 8 includes an inclined portion, as shown in FIG. 2, because of the presence of the thick field oxide film 2. The above silicides of high melting point metals, formed by the chemical vapor deposition method, can be formed only with difficulties because of the presence of this inclined portion. This poses a problem in that the word line 8 presents a higher electrical resistance at this portion.
On the other hand, while it is necessary to reduce the length of the field oxide film 2 for reducing the size of the device or element, another problem is posed in that, if the length of the field oxide film is reduced, the film thickness is also reduced, so that element isolation cannot be achieved satisfactorily.